; values in CAPS, self defined pointers and labels not,
; optimize for size rather than speed

	radix dec
	processor pic16f627
	list n=0,st=off,mm=on

#include "p16f627.inc" 

; initialize some preprocessor symbols
CONFIG_WORD = 0x3fff
OPTION_REG_CONFIG = 0

; set config word
CONFIG_WORD &= _CP_OFF & _DATA_CP_OFF	; turn all code protection off
CONFIG_WORD &= _LVP_OFF 		; disable Low Voltage Programming
CONFIG_WORD &= _BODEN_ON		; enable Brown-out Detect Reset
CONFIG_WORD &= _MCLRE_ON		; enable reset pin
CONFIG_WORD &= _PWRTE_ON		; enable power on timer
CONFIG_WORD &= _WDT_OFF			; disable Watchdog Timer
CONFIG_WORD &= _INTRC_OSC_NOCLKOUT	; enable internal oscillator

	__config CONFIG_WORD

; some useful definitions
RA0		equ	0		; RA0 is bit zero in PORTA

; file registers in bank 0,1,2,3
columns		equ	0x70		; amount of columns in eeprom
buffer_hi	equ	0x71		; the actual buffer (high bits)
buffer_lo	equ	0x72		; the actual buffer (low bits)
count0		equ	0x73		; useful counter for bit unpacking loop
outer_delay	equ     0x7e 		; delay routine
inner_delay	equ     0x7f		; counters for primitive

; font bitmaps in EEPROM, variable width 

	org 0x2100

start_text
	; 0
	de b'00111111'
	de b'01100110'
	de b'11111100'

	; 1
	de b'11000000'
	de b'10001111'
	de b'11111100'

	; 2
	de b'00000000'
	de b'11111000'
	de b'10000011'
	
	; 3
	de b'11000000'
	de b'00001011'
	de b'01111100'

	; 4
	de b'11010000'
	de b'00000011'
	de b'00111101'

	; 5
	de b'11000000'
	de b'00000111'
	de b'00111101'

	; 6
	de b'11010000'
	de b'00000011'
	de b'00111000'

	; 7
	de b'01010101'
	de b'10000101'
	de b'00000000'

	; 8
	de b'00011111'
	de b'00000010'
	de b'01000001'

	; 9
	de b'01000000'
	de b'01010010'
	de b'01010101'

	; A
	de b'00011110'
	de b'11110000'
	de b'00000010'

	; B
	de b'01001001'
	de b'01010101'
	de b'01111001'

	; C
	de b'10000000'
	de b'01010100'
	de b'01010101'

	; D
	de b'00001111'
	de b'11110000'
	de b'01000001'

	; E
	de b'11010000'
	de b'00000011'
	de b'00100000'

	; F
	de b'01011110'
	de b'00010010'
	de b'00000000'
end_text	

	org 0x0000

reset_vector ; the chip starts executing our code here

	movlw 1<<CM2|1<<CM1|1<<CM0	; disable Comparators
	movwf CMCON

	clrf PORTB			; init PORTB while still in bank 0

interrupt_vector	; interrupt vector is here, interrupts are disabled and
			; we don't need them, so we ignore the interrupt vector

	; we aim to be in bank 1 most of the time, PORTA/B will be
	; addressed through FSR and INDF

	bsf STATUS, RP0		; switch to bank 1

	bcf PCON, OSCF		; use 37kHz clock (for debugging)

	movlw b'11000000'	; RB5:RB0 are outputs, RB7:RB6 inputs
	movwf TRISB

	movlw 0xFF		; RA7:RA0 are inputs
	movwf TRISA

	movlw PORTB
	movwf FSR

main_loop
	decf FSR, f			; switch to PORTA
	
standby
	btfss INDF, RA0	; start if button is pressed, otherwise wait
	goto standby

	call proc_long_delay

	clrf EEADR

	movlw 64
	movwf columns

	incf FSR, f			; switch to PORTB ( = PORTA + 1)

	call proc_read_data
	movwf buffer_lo

output_reinit
	movlw -8
	movwf count0
	goto after_read

output_loop
	movf count0, w
	sublw -8
	call proc_buffer_shr_w

	incf count0, f
	incf count0, f
	btfsc STATUS, Z
	goto output_reinit

	call proc_read_data
	movwf buffer_hi

	movf count0, w
	call proc_buffer_shr_w

after_read
	movf buffer_lo, w
	movwf INDF

	call proc_short_delay

	decfsz columns
	goto output_loop	

	goto main_loop

; these procedures rotate buffer(hi/lo) as a 16 bit word,
; we don't care what gets added on the left side
; entrypoint is proc_buffer_shr_w, we shift -w bits
buffer_shr_loop
	rrf buffer_hi, f
	rrf buffer_lo, f
	addlw 1

proc_buffer_shr_w
	btfss STATUS, Z
	goto buffer_shr_loop

	return

proc_read_data			; we read EEPROM data in buffer_hi

	bsf EECON1, RD			; issue read command to EEPROM
	movf EEDATA, w			; read actual data
	incf EEADR, f			; increment EEPROM address

	return

proc_long_delay
	movlw 0x50			; non-debug value is 0x50
	movwf outer_delay
	goto outer_delay_loop

proc_short_delay
	movlw 0x01
	movwf outer_delay

outer_delay_loop   
	movlw 0x02
	movwf inner_delay

inner_delay_loop
	decfsz inner_delay, f
	goto inner_delay_loop
		
	decfsz outer_delay, f
	goto outer_delay_loop

	return

	end