; values in CAPS, self defined pointers and labels not,
; optimize for size rather than speed

	radix dec
	processor pic16f628a
	list n=0,st=off

#include "p16f628a.inc"

CONFIG_WORD = 0x3fff
OPTION_REG_CONFIG = 0

; set config word
CONFIG_WORD &= _CP_OFF & _DATA_CP_OFF	; turn all code protection off
CONFIG_WORD &= _LVP_OFF			; disable Low Voltage Programming
;CONFIG_WORD &= _BODEN_ON		; enable Brown-out Detect Reset
CONFIG_WORD &= _BODEN_OFF		; disable Brown-out Detect Reset
CONFIG_WORD &= _MCLRE_ON		; enable MCLRE
CONFIG_WORD &= _PWRTE_ON		; enable power on timer
CONFIG_WORD &= _WDT_OFF			; disable Watchdog Timer
CONFIG_WORD &= _INTRC_OSC_NOCLKOUT	; use internal OSC, freeup RB7:RB6

	__config CONFIG_WORD

ctr0	equ 0x70
ctr1	equ 0x71
ctr2	equ 0x72

	org 0x0000

reset_vector	; the chip starts executing our code here
	
	; interrrupts are disabled by default, we are in bank 0

	movlw 1<<CM2|1<<CM1|1<<CM0	; disable Comparators
	movwf CMCON

	clrf PORTA			; init PORTA outputs to 0

	bsf STATUS, RP0			; switch to bank 1

	; pin 12: RB6 digital input, PC clock, interrupt on change
	; pin  6: INT zero crossing detector, rising edge interrupt (digital in)
	; pin  9: RB3 digital input, PC data
	; pin 17: RA0 digital output, controls dim0
	; pin 18: RA1 digital output, controls dim1

	movlw b'11111110'
	movwf TRISA

	; we only care about these bits in OPTION_REG
OPTION_REG_CONFIG &= ~1<<NOT_RBPU	; enable Weak Pull Up
OPTION_REG_CONFIG |= 1<<INTEDG		; interrupt in rising edge of INT
OPTION_REG_CONFIG &= ~1<<T0CS		; Timer0 clock source = internal
OPTION_REG_CONFIG |= 1<<PSA		; assign prescaler to WDT

	movlw OPTION_REG_CONFIG
	movwf OPTION_REG

	bcf STATUS, RP0			; switch to bank 0

	movlw b'00000001'
	movwf PORTA

begin
	call zero
	call null
	call null
	call zero
	call zero
	call zero
	call zero
	call zero
	call zero
	call zero
	call zero
	call zero
	call zero
	call null
	call null
	call null
	call null
	call null
	call null
	call null
	call null
	call null
	call zero
	call null
	call null
	call zero
	call zero
	call zero
	call one
	call zero
	call one
	call one
	call one
	call one
	call one

	clrf ctr1

outer_loop

	clrf ctr0
inner_loop
	decfsz ctr0
	goto inner_loop
	
	decfsz ctr1
	goto outer_loop

	goto begin

null
	call dark ; 21, 22
	nop	  ; 17
	nop	  ; 18
	nop	  ; 19
	nop	  ; 20
	call dark ; 21, 22
	return    ; 17, 18

zero    
	call light ; 21, 22
	nop	  ; 17
	nop	  ; 18
	nop	  ; 19
	nop	  ; 20
	call dark ; 21, 22
	return    ; 17, 18

one    
	call dark  ; 21, 22
	nop	   ; 17
	nop	   ; 18
	nop	   ; 19
	nop	   ; 20
	call light ; 21, 22
	return     ; 17, 18


light
	movlw 20	; 23
	movwf ctr0	; 24
light_loop
	call flash	; 25, 26
	decfsz ctr0, f  ; 13 (14)
	goto light_skip	; 14, 15
	return		; 15, 16
light_skip
	nop		; 16
	nop		; 17
	nop		; 18
	nop		; 19
	nop		; 20
	nop		; 21
	nop		; 22
	goto light_loop	; 23, 24

dark
	movlw 20	; 23
	movwf ctr0	; 24
dark_loop
	call noflash	; 25, 26
	decfsz ctr0, f  ; 13 (14)
	goto dark_skip	; 14, 15
	return		; 15, 16
dark_skip
	nop		; 16
	nop		; 17
	nop		; 18
	nop		; 19
	nop		; 20
	nop		; 21
	nop		; 22
	goto dark_loop	; 23, 24

flash
	bsf PORTA, 0   ; 1
	nop            ; 2
	nop            ; 3
	nop            ; 4
	nop            ; 5
	nop            ; 6
	nop            ; 7
	nop            ; 8
	nop            ; 9
	bcf PORTA, 0   ; 10
	return         ; 11, 12

noflash
	nop    ; 1
	nop    ; 2
	nop    ; 3
	nop    ; 4
	nop    ; 5
	nop    ; 6
	nop    ; 7
	nop    ; 8
	nop    ; 9
	nop    ; 10
	return ; 11, 12

	end